
PIC18F85J11 FAMILY
DS39774D-page 144
2010 Microchip Technology Inc.
TABLE 11-13: PORTF FUNCTIONS
TABLE 11-14: SUMMARY OF REGISTERS ASSOCIATED WITH PORTF
Pin Name
Function
TRIS
Setting
I/O
Type
Description
RF1/AN6/
C2OUT
RF1
0
O
DIG
LATF<1> data output; not affected by analog input.
1
I
ST
PORTF<1> data input; disabled when analog input enabled.
AN6
1
I
ANA
A/D Input Channel 6. Default configuration on POR.
C2OUT
0
O
DIG
Comparator 2 output; takes priority over port data.
RF2/AN7/
C1OUT
RF2
0
O
DIG
LATF<2> data output; not affected by analog input.
1
I
ST
PORTF<2> data input; disabled when analog input enabled.
AN7
1
I
ANA
A/D Input Channel 7. Default configuration on POR.
C1OUT
0
O
TTL
Comparator 1 output; takes priority over port data.
RF3/AN8
RF3
0
O
DIG
LATF<3> data output; not affected by analog input.
1
I
ST
PORTF<3> data input; disabled when analog input enabled.
AN8
1
I
ANA
A/D Input Channel 8 and Comparator C2+ input. Default input
configuration on POR; not affected by analog output.
RF4/AN9
RF4
0
O
DIG
LATF<4> data output; not affected by analog input.
1
I
ST
PORTF<4> data input; disabled when analog input enabled.
AN9
1
I
ANA
A/D Input Channel 9 and Comparator C2- input. Default input
configuration on POR; does not affect digital output.
RF5/AN10/
CVREF
RF5
0
O
DIG
LATF<5> data output; not affected by analog input. Disabled when
CVREF output enabled.
1
I
ST
PORTF<5> data input; disabled when analog input enabled. Disabled
when CVREF output enabled.
AN10
1
I
ANA
A/D Input Channel 10 and Comparator C1+ input. Default input
configuration on POR.
CVREF
x
O
ANA
Comparator voltage reference output. Enabling this feature disables
digital I/O.
RF6/AN11
RF6
0
O
DIG
LATF<6> data output; not affected by analog input.
1
I
ST
PORTF<6> data input; disabled when analog input enabled.
AN11
1
I
ANA
A/D Input Channel 11 and Comparator C1- input. Default input
configuration on POR; does not affect digital output.
RF7/AN5/SS
RF7
0
O
DIG
LATF<7> data output.
1
I
ST
PORTF<7> data input.
AN5
1
I
ANA
A/D Input Channel 5. Default configuration on POR.
SS
1
I
TTL
Slave select input for MSSP module.
Legend:
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input,
x
= Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Name
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0
Reset
Values
on page
PORTF
RF7
RF6
RF5
RF4
RF3
RF2
RF1
LATF
LATF7
LATF6
LATF5
LATF4
LATF3
LATF2
LATF1
TRISF
TRISF7TRISF6TRISF5TRISF4TRISF3TRISF2TRISF1
ADCON1
—
VCFG1
VCFG0
PCFG3
PCFG2
PCFG1
PCFG0
CMCON
C2OUT
C1OUT
C2INV
C1INV
CIS
CM2
CM1
CM0
CVRCON
CVREN
CVROE
CVRR
CVRSS
CVR3
CVR2
CVR1
CVR0
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PORTF.